1. Field of the Invention
The present invention relates to a DC/DC converter employing a bootstrap method.
2. Description of the Related Art
Various kinds of electronic devices employ a DC/DC converter that converts a DC voltage having a given voltage value into a DC voltage having a different voltage value. FIG. 1 is a circuit diagram showing a step-down DC/DC converter (Buck converter). A DC/DC converter 100R receives a DC input voltage VIN via an input terminal 102, and generates an output voltage VOUT having a reduced voltage value at an output terminal 104. The DC/DC converter 100R includes an output circuit 110R and a control circuit 200R. The output circuit 110R mainly includes a switching transistor M1, an inductor L1, a rectifier diode D1, and an output capacitor C1. The output capacitor C1 is connected to the output terminal 104. One end of the inductor L1 is connected to a switching (LX) terminal of the control circuit 200R. The other end of the inductor L1 is connected to the output terminal 104. The rectifier diode D1 is arranged such that its anode is grounded and its cathode is connected to the LX terminal.
The switching transistor M1 is built into the control circuit 200R. A VCC terminal of the control circuit 200R is connected to the input terminal 102. The DC input voltage VIN is supplied to the VCC terminal. The switching transistor M1 is configured as an N-channel MOSFET, which is arranged such that its source is connected to the LX terminal and its drain is connected to the VCC terminal.
A detection terminal (VS) receives, as a feedback signal, a signal that indicates the state (current state, voltage state, electric power state, or the like) of the DC/DC converter 100R or otherwise the state of a load (not shown) connected to the output terminal 104. A pulse generator 202 generates a pulse signal (high-side pulse signal) S1 having a factor such as a duty ratio, frequency, or otherwise a combination thereof that is changed such that the state of the DC/DC converter 100R or otherwise the state of the load approaches a target state. For example, in a case in which the DC/DC converter 100R is configured as a constant voltage output DC/DC converter, the pulse generator 202 generates the high-side pulse signal S1 such that the output voltage VOUT approaches a target voltage VREF. In a case in which the DC/DC converter 100R is configured as a constant current output DC/DC converter, the pulse generator 202 generates the high-side pulse signal S1 such that a current IOUT that flows through the load approaches a target value IREF.
A driver 204 switches on and off the switching transistor M1 according to the high-side pulse signal S1. In a case in which the switching transistor M1 is configured as an N-channel MOSFET as described above, in order to turn on the switching transistor M1, there is a need to apply a voltage to the gate of the switching transistor M1 that is higher than the voltage between its drain and source (i.e., input voltage VIN). In order to supply such a voltage, a bootstrap circuit 210 is arranged. The bootstrap circuit 210 includes a bootstrap capacitor C2, a rectifier element 212, a transistor 214, and a bootstrap power supply circuit 220. The bootstrap capacitor C2 is arranged in the form of an external component between the LX terminal and a bootstrap (BST) terminal. The bootstrap power supply circuit 220 generates a constant voltage VCCBST. The rectifier element 212 is arranged between the BST terminal and an output of the bootstrap power supply circuit 220. The transistor 214 is arranged between the LX terminal and the ground. The voltage VBST at the BST terminal is supplied to the upper-side power supply terminal of the driver 204.
During a period in which the switching transistor M1 is turned off, the transistor 214 is turned on, which grounds one end (LX-side end) of the bootstrap capacitor C2. In this state, the voltage VCCBST is applied to the other end (BST-side end) of the bootstrap capacitor C2 via the rectifier element 212. Accordingly, the bootstrap capacitor C2 is charged using the voltage across both ends thereof represented by (VCCBST−VF). Here, VF represents the forward voltage of the rectifier element 212. Such an arrangement is designed such that the relation VCCBST−VF>VGS(TH) holds true. Here, VGS(TH) represents a gate-source threshold voltage of the switching transistor M1.
In the turned-on period of the switching transistor M1, with the source voltage of the switching transistor M1 as VLX, the voltage VBST at the BST terminal is represented by VBST=VLx+(VCCBST−VF). The driver 204 uses the voltage VBST as a high-level voltage to be applied to the gate of the switching transistor M1. In this period, the gate-source voltage VGS is represented by VGS=VBST−VLX=(VCCBST−VF). That is to say, the relation VGS>VGS(TH) holds true. Thus, the switching transistor M1 is turned on.
As a result of investigating such a DC/DC converter 100R shown in FIG. 1, the present inventors have come to recognize the following problem. With the step-down DC/DC converter, in a steady state, the switching duty ratio D of the switching transistor M1 is determined according to the ratio between the input voltage VIN and the output voltage VOUT, as represented by D=VOUT/VIN.
Accordingly, in a state in which the output voltage Vin becomes a value in the vicinity of the input voltage Vout, the duty ratio rises to almost 100%. Such a state occurs in a reduced voltage state in which the input voltage VIN falls, for example. In a case in which the step-down DC/DC converter includes the switching transistor M1 configured as a P-channel MOSFET, by supplying the driving signal having a duty ratio of 100% (i.e., an always-on signal) to the gate of the switching transistor M1, such an arrangement is capable of generating the output voltage VOUT having a voltage value in the vicinity of the input voltage VIN.
However, in a case in which the switching transistor M1 is configured as an N-channel MOSFET as shown in FIG. 1, such an arrangement does not supply the gate driving signal with a duty ratio of 100%. This is because the bootstrap capacitor C2 is charged in an off period of the switching transistor M1. If the switching transistor M1 is fixedly turned on, there is no time for charging the bootstrap capacitor C2. This leads to a reduction in the voltage VBST at the BST terminal, resulting in the gate-source voltage of the switching transistor M1 becoming lower than the threshold voltage VGS(TH). This leads to a problem in that the switching transistor M1 cannot be maintained in the on state.
In order to solve such a problem, with the control circuit 200R including the bootstrap circuit 210, a maximum value (which will be referred to as the “maximum duty ratio DMAX”) is set for the duty ratio of the gate driving signal to be applied to the switching transistor M1 so as to generate the high-side pulse signal S1 in a range such that it does not exceed the maximum duty ratio DMAX. This means that the range of the input voltage VIN (input voltage range) that can be employed to generate a desired output voltage VOUT is limited such that the relation VIN>VOUT/DMAX holds true. As the maximum duty ratio DMAX becomes larger, the lower limit of the input voltage range can become lower. For example, with the pulse generator 202 configured as a PWM pulse generator, the maximum duty ratio DMAX is limited to on the order of 90% due to various kinds of limitations such as circuit response delay and the like.